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Understanding Silicon Wafer Orientation and Crystal Structure

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  • icon2 January 13, 2024
  • icon3 WaferPro
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Have you ever looked closely at a silicon wafer and wondered why they have a flat edge? Or why crystal orientation matters in semiconductor manufacturing? As a leading manufacturer of silicon wafers for semiconductors, we at WaferPro often get asked by customers about the importance of silicon wafer orientation. In this blog post, we’ll provide an in-depth look at silicon crystal structure, miller indices, wafer flats, and why silicon wafer orientation is crucial for silicon wafers used in semiconductor fabrication.

Silicon Crystal Structure

Silicon has a diamond cubic crystal structure. This means that the silicon atoms are arranged in a three-dimensional diamond pattern, with each atom covalently bonded to four nearest neighbors. The unit cell is cubic in shape. Understanding this underlying crystal structure is key to making sense of miller indices and wafer orientation.

Miller Indices

Miller Indices

The orientation of crystals is indicated using the miller index notation. This notation consists of three integers (hkl) and is related to the orientation of the crystal planes. Some key aspects of miller indices:

  • The integers denote the inverse of the intercepts the crystal plane makes with the x, y, and z axes
  • The plane with miller indices (100) is parallel to the x axis, plane (010) is parallel to the y axis, and so on
  • Low index planes like (100), (110) and (111) are important in describing silicon wafer orientation
Miller-indices-planes

So miller indices provide a standardized way to specify directions and planes in the crystal structure. Knowing the miller index is crucial for understanding wafer orientation.

Silicon Wafer Flats

Silicon Wafer Flats

Take a close look at a standard silicon wafer and you’ll notice a small flat portion along the otherwise circular edge. This flat is used to indicate crystal orientation and defines the primary flat or primary major flat.

Some key points on wafer flats:

  • Wafers will often have one or two flats cut along the edge
  • The primary wafer flat is used to indicate properties like crystal orientation, doping type, and resistivity
  • Secondary flats may be used for additional orientation info or wafer tracing
  • Flats are positioned relative to the crystal plane / miller indices

So flats serve as a visual cue for the crystal orientation of the wafer. Understanding the alignment of the wafer flat is key to properly orienting crystals in fabrication.

Why Silicon Wafer Orientation Matters

For silicon wafers used in semiconductor devices, orientation is extremely important. The orientation affects:

  • Defect density - Some planes like (111) have lower surface state defect density
  • Surface smoothness - Surfaces like (100) tend to be flatter and smoother
  • Dopant solubility - Dopant atoms can incorporate into the lattice differently depending on orientation
  • Etching - Wet and dry etching rates vary considerably with different crystal planes
  • Epitaxial growth - The quality and speed of epitaxial growth depends on the plane

The operation of transistors, diodes, and IC components depend critically on the perfection of the silicon wafer surface. That’s why understanding and properly specifying wafer orientation is so vital for both wafer manufacturers and device fabricators.

Key Silicon Wafer Orientations

While silicon can be sliced into wafers with a wide variety of orientations, there are three important industry standard orientations:

(100)-oriented silicon wafers

  • At WaferPro, the majority of our wafers are (100) oriented
  • Surface atoms are arranged in rows, facilitating dopamine and oxide growth
  • Yields flat, hydrophobic surfaces that enable small features to be patterned
  • Ideal for high-performance transistors and most advanced IC devices

(110) oriented silicon wafers

  • Less common orientation but offers unique benefits
  • Provides asymmetric surface structure for specialized devices
  • Used for niche MEMS applications and heterojunction bipolar transistors

(111) oriented silicon wafers

  • Has historically been used for early transistors and ICs
  • Exhibits lowest interface state and carrier surface charge densities
  • Support high mobility charge carriers desired for some analog ICs
  • Can enable very thin layers and sharp dopant profiles

So while (100) wafers tend to dominate advanced logic and memory chips, the (110) and (111) orientations have unique properties that are useful for certain applications.

Partner with the Orientation Experts

As you can see, understanding crystal structure, wafer orientation, and miller indices is key to fabricating advanced semiconductor devices. Here at WaferPro, we live and breathe this stuff! As a leading semiconductor wafer manufacturer for over 25 years, WaferPro offers:

✔️ Broad range of silicon wafer sizes, orientations, types

✔️ High quality, precision oriented wafers

✔️ Advanced 300mm wafer capabilities

✔️ Unparalleled customer support

For all your specialty silicon wafer needs, be sure to contact WaferPro today. Our team of experts is happy to help advise you on selecting the optimal wafer orientation and deliver samples tailored to your application.

Key Properties of Common Silicon Wafer Orientations

Now that we’ve covered some of the basics on crystal structure and orientation, let’s take a more detailed look at the properties of key silicon wafer orientations used in semiconductor manufacturing:

(100)-Oriented Silicon Wafers

Relative Position of Crystalline Planes in a 100 Wafer
Relative Position of Crystalline Planes in a 100 Wafer

(100) wafers account for most of total silicon wafer production and are the workhorse orientation for advanced IC fabs. Some notable properties include:

  • Atomic Structure: Top layer atoms arranged in rows with each atom bonded to two atoms in layer below
  • Surface Flatness: Excellent flatness across wafer surface
  • Defect Density: Moderately low defect density
  • Dopant Solubility: High maximum solid solubility for common n- and p-type dopants
  • Oxidation: Forms high-quality thermal oxide for gate dielectrics
  • Etch Rates: Intermediate anisotropic wet etch rates

(110) Oriented Silicon Wafers

(110) wafers represent only around 5% of wafer production but offer unique advantages:

  • Atomic Structure: Distorted tetrahedral configuration with dangling bonds
  • Surface Flatness: Very smooth surfaces and uniform wafer bow
  • Defect Density: Low defect densities possible
  • Dopant Solubility: High solubility for n-type, lower for p-type
  • Oxidation: Lower quality oxide growth compared to (100)
  • Etch Rates: Fasts wet etch rates in some directions

(111) Oriented Silicon Wafers

Historically important but more specialized today, key attributes of (111) wafers include:

  • Atomic Structure: Close packed structure with three bonds between layers
  • Surface Flatness: Excellent flatness retained after processing
  • Defect Density: The lowest defect density of the low-index planes
  • Dopant Solubility: Sharper dopant profiles achievable
  • Oxidation: Lower oxide growth rate and interface trap density
  • Etch Rates: Slowest wet etch rate along (111) direction

Optimizing Silicon Wafer Orientation for Devices

We’ve covered the basic miller indices used to denote orientations and some properties of key wafer planes. However, engineers considering which wafer orientation to use for their devices need to dig deeper. The optimum orientation depends on balancing tradeoffs between defect density, dopant diffusion, interface properties, etching characteristics and more. Here we look at how selecting the orientation impacts common semiconductor devices.

Optimizing Wafers for CMOS Logic Devices

Silicon wafers used for fabricating advanced logic devices like microprocessors predominantly utilize the (100) orientation. This is because:

  • Smaller, higher density transistors can be patterned on smoother (100) surfaces
  • Thermal oxide growth quality is higher on (100) planes, enabling superior gate dielectrics
  • Ion implantation through the gate oxide is easier with a (100) substrate orientation

For these reasons, nearly all advanced CMOS logic devices have standardized on using silicon (100) wafers.

Choosing Orientations for Memory Chips

Silicon wafers used in DRAM, SRAM, and flash memory incorporate different orientation preferences:

  • DRAM manufacturing shifted to (100) orientation for better wafer flatness
  • SRAM on (100) also enables smaller features sizes with good yield
  • Flash memory utilizes (100) orientation primarily

So while earlier generations utilized more (111) oriented starting wafers, memory chips have mostly transitioned to leveraging (100) oriented silicon.

Optimizing for RF and Power Devices

RF components and power electronics can utilize more exotic wafer orientations like (110). This orientation is chosen when:

  • Higher carrier mobility on the (110) surface is needed
  • Selective etching of (110) planes simplifies die shaping
  • Reducing substrate coupling parasitics is required

So while RF and power devices represent smaller volume, they do occasionally employ non (100) orientations for specialized performance enhancement.

Tailoring for MEMS Devices

Micro-electromechanical systems (MEMS) have unique orientation demands because:

  • Non (100) orientation improves wet etching of three-dimensional structures
  • The orientation impacts residual stress in thin film layers
  • Non-standard orientations enable specialized sensing modalities

So MEMS processes frequently use wafers with (110), (111), or other exotic orientations tailored to the application.

Partnering with an Orientation Leader

As we’ve covered, subtle impacts of silicon wafer orientation can make or break device performance. That’s why choosing the right orientation is so crucial. Here at WaferPro, we provide:

✔️ Broad range of orientations - (100), (110), (111), (311), and more

✔️ Precision control of orientation - within +/- 1 degree

✔️ Advanced 300mm wafers capabilities

✔️ Fast prototyping of custom orientations

Contact our team today to discuss which wafer orientation makes the most sense for your next project!

Frequently Asked Questions

What is the cost difference between various silicon wafer orientations?

In general, (100) oriented wafers are the industry standard and have the lowest costs. Other orientations like (110) and (111) are more specialty offerings and have higher costs due to lower production volumes.

What wafer size options are available for non (100) orientations?

In the past, non (100) orientations were only produced in smaller diameters like 100mm or 150mm. But WaferPro now provides unique 300mm (110) and (111) wafer capabilities.

Can I order silicon-on-insulator (SOI) wafers in non-(100) orientations?

Yes - WaferPro supports custom SOI wafer production with orientations like (110) or (111) to enable specialized applications and devices.

How precise can you control wafer orientation?

Using our advanced Czochralski growth processing, we can precisely control the wafer orientation to within ±1 degree of specified Miller indices. Stricter tolerances are also possible.

Can different wafer flats or notches be used?

While standards have emerged around using a primary major flat to indicate orientation, WaferPro supports additional secondary flats or notches to indicate properties like doping or resistivity.

Are there limitations on available doping types and resistivities?

We offer industry-standard boron doping for p-type wafers and phosphorus doping for n-type wafers in a wide range of possible resistivities - even for non-(100) orientations.

We're happy to answer any other questions about specifying and ordering silicon wafers with specialized orientations. Our team can advise you on selecting the right orientation for your application needs.

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